Na obrazie który zbudowałem nie wykrywa huba usb. Strzelam że szczegół znowu tkwi w dts. Na konsolę dostaję to:
===================================================================
MT7621 stage1 code Mar 12 2015 14:43:30 (ASIC)
CPU=500000000 HZ BUS=166666666 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x31100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-800Mhz ===
PLL3 FB_DL: 0xa, 1/0 = 617/407 29000000
PLL4 FB_DL: 0x14, 1/0 = 635/389 51000000
PLL2 FB_DL: 0x18, 1/0 = 615/409 61000000
do DDR setting..[01F40000]
Apply DDR3 Setting...(use customer AC)
0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
--------------------------------------------------------------------------------
0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000F:| 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
0010:| 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0
0011:| 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0
0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
DRAMC_DQSCTL1[0e0]=14000000
DRAMC_DQSGCTL[124]=80000000
rank 0 coarse = 16
rank 0 fine = 56
B:| 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0
opt_dle value:9
DRAMC_DDR2CTL[07c]=C287221D
DRAMC_PADCTL4[0e4]=000022B3
DRAMC_DQIDLY1[210]=0B0B0A0B
DRAMC_DQIDLY2[214]=060B080A
DRAMC_DQIDLY3[218]=0A080808
DRAMC_DQIDLY4[21c]=09070B08
DRAMC_R0DELDLY[018]=00003132
==================================================================
RX DQS perbit delay software calibration
==================================================================
1.0-15 bit dq delay value
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 9 8 9 11 8 7 9 5 6 7
10 | 7 8 8 10 6 8
--------------------------------------
==================================================================
2.dqs window
x=pass dqs delay value (min~max)center
y=0-7bit DQ of every group
input delay:DQS0 =50 DQS1 = 49
==================================================================
bit DQS0 bit DQS1
0 (1~96)48 8 (1~94)47
1 (1~95)48 9 (1~95)48
2 (1~95)48 10 (1~95)48
3 (2~98)50 11 (1~93)47
4 (1~96)48 12 (1~97)49
5 (1~97)49 13 (1~96)48
6 (1~96)48 14 (0~96)48
7 (1~98)49 15 (1~96)48
==================================================================
3.dq delay value last
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 11 10 11 11 10 8 11 6 8 8
10 | 8 10 8 11 7 9
==================================================================
==================================================================
TX perbyte calibration
==================================================================
DQS loop = 15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1
dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2
DQ loop=15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=15, finish count=1
dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=2
byte:0, (DQS,DQ)=(8,8)
byte:1, (DQS,DQ)=(8,8)
DRAMC_DQODLY1[200]=88888888
DRAMC_DQODLY2[204]=88888888
20,data:88
[EMI] DRAMC calibration passed
===================================================================
MT7621 stage1 code done
CPU=500000000 HZ BUS=166666666 HZ
===================================================================
U-Boot 1.1.3 (Mar 31 2017 - 10:58:58)
Board: Ralink APSoC DRAM: 256 MB
relocate_code Pointer at: 8ffa8000
Config XHCI 40M PLL
flash manufacture id: ef, device id 40 19
find flash: W25Q256FV
*** Warning - bad CRC, using default environment
============================================
Ralink UBoot Version: 4.3.0.0
--------------------------------------------
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection
DRAM_TYPE: DDR3
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: SPI Flash
Date:Mar 31 2017 Time:10:58:58
============================================
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768
##### The CPU freq = 880 MHZ ####
estimate memory size =256 Mbytes
#Reset_MT7530
Catution: ResetButton wasn't pressed or not long enough!
Continuing normal boot...
============================================
Please choose the operation:
1: Load system code to SDRAM via TFTP.
2: Load system code then write to Flash via TFTP.
3: Boot system code via Flash (default).
4: Entr boot command line interface.
7: Load Boot Loader code then write to Flash via Serial.
9: Load Boot Loader code then write to Flash via TFTP. 0
3: System Boot system code via Flash.
## Booting image at bc050000 ...
Image Name: MIPS OpenWrt Linux-4.14.232
Image Type: MIPS Linux Kernel Image (lzma compressed)
Data Size: 1924154 Bytes = 1.8 MB
Load Address: 80001000
Entry Point: 80001000
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
No initrd
## Transferring control to Linux (at address 80001000) ...
## Giving linux memsize in MB, 256
Starting kernel ...
[ 0.000000] Linux version 4.14.232 (pcx@pcx-OptiPlex-7010) (gcc version 7.5.0 (OpenWrt GCC 7.5.0 r11351-a1ee0ebbd8)) #0 SMP Sun May 16 21:55:26 2021
[ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
[ 0.000000] bootconsole [early0] enabled
[ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[ 0.000000] MIPS: machine is Oolite-v8 32MB
[ 0.000000] Determined physical RAM map:
[ 0.000000] memory: 1c000000 @ 00000000 (usable)
[ 0.000000] memory: 04000000 @ 20000000 (usable)
[ 0.000000] Initrd not found or empty - disabling initrd
[ 0.000000] VPE topology {2,2} total 4
[ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x000000000fffffff]
[ 0.000000] HighMem [mem 0x0000000010000000-0x0000000023ffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x000000001bffffff]
[ 0.000000] node 0: [mem 0x0000000020000000-0x0000000023ffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000023ffffff]
[ 0.000000] random: get_random_bytes called from start_kernel+0x94/0x4ac with crng_init=0
[ 0.000000] percpu: Embedded 14 pages/cpu s26192 r8192 d22960 u57344
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 130560
[ 0.000000] Kernel command line: console=ttyS0,57600 rootfstype=squashfs,jffs2
[ 0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
[ 0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
[ 0.000000] Writing ErrCtl register=00006133
[ 0.000000] Readback ErrCtl register=00006133
[ 0.000000] Memory: 511860K/524288K available (4548K kernel code, 227K rwdata, 1008K rodata, 1244K init, 248K bss, 12428K reserved, 0K cma-reserved, 262144K highmem)
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] NR_IRQS: 256
[ 0.000000] CPU Clock: 880MHz
[ 0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
[ 0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns
[ 0.000011] sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns
[ 0.015551] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
[ 0.087864] pid_max: default: 32768 minimum: 301
[ 0.097203] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.110228] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.126438] Hierarchical SRCU implementation.
[ 0.136125] smp: Bringing up secondary CPUs ...
[ 0.146690] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.146700] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.146715] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.146884] CPU1 revision is: 0001992f (MIPS 1004Kc)
[ 0.205354] Synchronize counters for CPU 1: done.
[ 0.276949] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.276957] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.276966] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.277045] CPU2 revision is: 0001992f (MIPS 1004Kc)
[ 0.326552] Synchronize counters for CPU 2: done.
[ 0.387671] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.387682] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.387691] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.387778] CPU3 revision is: 0001992f (MIPS 1004Kc)
[ 0.446125] Synchronize counters for CPU 3: done.
[ 0.505738] smp: Brought up 1 node, 4 CPUs
[ 0.517872] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[ 0.537371] futex hash table entries: 1024 (order: 3, 32768 bytes)
[ 0.549846] pinctrl core: initialized pinctrl subsystem
[ 0.561938] NET: Registered protocol family 16
[ 0.582941] pull PCIe RST: RALINK_RSTCTRL = 0
[ 0.891927] release PCIe RST: RALINK_RSTCTRL = 7000000
[ 0.901995] ***** Xtal 40MHz *****
[ 0.908724] release PCIe RST: RALINK_RSTCTRL = 7000000
[ 0.918933] Port 0 N_FTS = 1b102800
[ 0.925831] Port 1 N_FTS = 1b102800
[ 0.932758] Port 2 N_FTS = 1b102800
[ 2.091486] PCIE0 no card, disable it(RST&CLK)
[ 2.100179] PCIE1 no card, disable it(RST&CLK)
[ 2.108978] -> 2107f2
[ 2.113656] PCIE2 enabled
[ 2.118839] PCI host bridge /pcie@1e140000 ranges:
[ 2.128363] MEM 0x0000000060000000..0x000000006fffffff
[ 2.138726] IO 0x000000001e160000..0x000000001e16ffff
[ 2.149082] PCI coherence region base: 0xbfbf8000, mask/settings: 0x60000000
[ 2.174303] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 2.185663] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 2.196986] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 2.210065] PCI host bridge to bus 0000:00
[ 2.218162] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
[ 2.231761] pci_bus 0000:00: root bus resource [io 0xffffffff]
[ 2.243514] pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
[ 2.256988] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
[ 2.273237] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 2.289781] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
[ 2.302836] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
[ 2.316632] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
[ 2.330111] pci 0000:00:00.0: BAR 9: assigned [mem 0x60100000-0x601fffff pref]
[ 2.344448] pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff]
[ 2.357933] pci 0000:00:00.0: BAR 7: no space for [io size 0x1000]
[ 2.370366] pci 0000:00:00.0: BAR 7: failed to assign [io size 0x1000]
[ 2.383512] pci 0000:01:00.0: BAR 6: assigned [mem 0x60100000-0x6010ffff pref]
[ 2.397844] pci 0000:01:00.0: BAR 5: assigned [mem 0x60000000-0x600001ff]
[ 2.411325] pci 0000:01:00.0: BAR 4: no space for [io size 0x0010]
[ 2.423766] pci 0000:01:00.0: BAR 4: failed to assign [io size 0x0010]
[ 2.436894] pci 0000:01:00.0: BAR 0: no space for [io size 0x0008]
[ 2.449333] pci 0000:01:00.0: BAR 0: failed to assign [io size 0x0008]
[ 2.462469] pci 0000:01:00.0: BAR 2: no space for [io size 0x0008]
[ 2.474910] pci 0000:01:00.0: BAR 2: failed to assign [io size 0x0008]
[ 2.488042] pci 0000:01:00.0: BAR 1: no space for [io size 0x0004]
[ 2.500482] pci 0000:01:00.0: BAR 1: failed to assign [io size 0x0004]
[ 2.513619] pci 0000:01:00.0: BAR 3: no space for [io size 0x0004]
[ 2.526057] pci 0000:01:00.0: BAR 3: failed to assign [io size 0x0004]
[ 2.539192] pci 0000:00:00.0: PCI bridge to [bus 01]
[ 2.549028] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff]
[ 2.562519] pci 0000:00:00.0: bridge window [mem 0x60100000-0x601fffff pref]
[ 2.578618] clocksource: Switched to clocksource GIC
[ 2.590437] NET: Registered protocol family 2
[ 2.599794] TCP established hash table entries: 2048 (order: 1, 8192 bytes)
[ 2.613575] TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
[ 2.626350] TCP: Hash tables configured (established 2048 bind 2048)
[ 2.639110] UDP hash table entries: 256 (order: 1, 8192 bytes)
[ 2.650640] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[ 2.663353] NET: Registered protocol family 1
[ 2.908543] 4 CPUs re-calibrate udelay(lpj = 2924544)
[ 2.920390] Crashlog allocated RAM at address 0x3f00000
[ 2.930964] workingset: timestamp_bits=30 max_order=17 bucket_order=0
[ 2.952405] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 2.963912] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[ 2.986655] random: fast init done
[ 2.994170] bounce: pool size: 64 pages
[ 3.001694] io scheduler noop registered
[ 3.009475] io scheduler deadline registered (default)
[ 3.020955] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
[ 3.035189] console [ttyS0] disabled
[ 3.042330] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 19, base_baud = 3125000) is a 16550A
[ 3.060234] console [ttyS0] enabled
[ 3.060234] console [ttyS0] enabled
[ 3.074009] bootconsole [early0] disabled
[ 3.074009] bootconsole [early0] disabled
[ 3.092362] MediaTek Nand driver init, version v2.1 Fix AHB virt2phys error
[ 3.106758] spi-mt7621 1e000b00.spi: sys_freq: 220000000
[ 3.129527] m25p80 spi0.0: w25q256 (32768 Kbytes)
[ 3.138974] 4 fixed-partitions partitions found on MTD device spi0.0
[ 3.151626] Creating 4 MTD partitions on "spi0.0":
[ 3.161177] 0x000000000000-0x000000030000 : "u-boot"
[ 3.172308] 0x000000030000-0x000000040000 : "u-boot-env"
[ 3.184119] 0x000000040000-0x000000050000 : "factory"
[ 3.195388] 0x000000050000-0x000002000000 : "firmware"
[ 3.207036] 2 uimage-fw partitions found on MTD device firmware
[ 3.218881] Creating 2 MTD partitions on "firmware":
[ 3.228800] 0x000000000000-0x0000001d5c7a : "kernel"
[ 3.239948] 0x0000001d5c7a-0x000001fb0000 : "rootfs"
[ 3.251037] mtd: device 5 (rootfs) set to be root filesystem
[ 3.262473] 1 squashfs-split partitions found on MTD device rootfs
[ 3.274819] 0x0000004e0000-0x000001fb0000 : "rootfs_data"
[ 3.287679] libphy: Fixed MDIO Bus: probed
[ 3.360652] libphy: mdio: probed
[ 4.766912] mtk_soc_eth 1e100000.ethernet: loaded mt7530 driver
[ 4.779649] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 22
[ 4.799390] NET: Registered protocol family 10
[ 4.810170] Segment Routing with IPv6
[ 4.817553] NET: Registered protocol family 17
[ 4.826519] 8021q: 802.1Q VLAN Support v1.8
[ 4.837724] hctosys: unable to open rtc device (rtc0)
[ 4.857135] VFS: Mounted root (squashfs filesystem) readonly on device 31:5.
[ 4.877538] Freeing unused kernel memory: 1244K
[ 4.886710] This architecture does not have kernel memory protection.
[ 5.660077] init: Console is alive
[ 5.667133] init: - watchdog -
[ 6.596215] kmodloader: loading kernel modules from /etc/modules-boot.d/*
[ 6.633755] mtk_soc_eth 1e100000.ethernet eth0: port 2 link up
[ 6.753791] usbcore: registered new interface driver usbfs
[ 6.764928] usbcore: registered new interface driver hub
[ 6.775668] usbcore: registered new device driver usb
[ 6.790618] kmodloader: done loading kernel modules from /etc/modules-boot.d/*
[ 6.809115] init: - preinit -
[ 7.761635] mtk_soc_eth 1e100000.ethernet: PPE started
Press the [f] key and hit [enter] to enter failsafe mode
Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level
[ 11.129734] jffs2: notice: (429) jffs2_build_xattr_subsystem: complete building xattr subsystem, 1 of xdatum (0 unchecked, 1 orphan) and 1 of xref (1 dead, 0 orphan) found.
[ 11.163205] mount_root: switching to jffs2 overlay
[ 11.193947] overlayfs: upper fs does not support tmpfile.
[ 11.212973] urandom-seed: Seeding with /etc/urandom.seed
[ 11.315639] mtk_soc_eth 1e100000.ethernet: 0x100 = 0x6060000c, 0x10c = 0x80818
[ 11.338758] procd: - early -
[ 11.344630] procd: - watchdog -
[ 12.018787] procd: - watchdog -
[ 12.025448] procd: - ubus -
[ 12.119661] random: ubusd: uninitialized urandom read (4 bytes read)
[ 12.133286] random: ubusd: uninitialized urandom read (4 bytes read)
[ 12.146482] random: ubusd: uninitialized urandom read (4 bytes read)
[ 12.160090] procd: - init -
Please press Enter to activate this console.
[ 12.741411] kmodloader: loading kernel modules from /etc/modules.d/*
[ 12.759958] ip6_tables: (C) 2000-2006 Netfilter Core Team
[ 12.778433] Loading modules backported from Linux version v4.19.189-0-g97a8651cadce
[ 12.793743] Backport generated by backports.git v4.19.189-1-0-gf6aeae51
[ 12.809546] ip_tables: (C) 2000-2006 Netfilter Core Team
[ 12.827704] nf_conntrack version 0.5.0 (8192 buckets, 32768 max)
[ 12.882135] xt_time: kernel timezone is -0000
[ 12.912256] urngd: v1.0.2 started.
[ 12.955695] PPP generic driver version 2.4.2
[ 12.966896] NET: Registered protocol family 24
[ 13.000831] usbcore: registered new interface driver rt2800usb
[ 13.013364] kmodloader: done loading kernel modules from /etc/modules.d/*
[ 13.079579] random: crng init done
[ 13.086371] random: 7 urandom warning(s) missed due to ratelimiting
[ 18.493364] mtk_soc_eth 1e100000.ethernet: PPE started
[ 18.510145] br-lan: port 1(eth0.1) entered blocking state
[ 18.521143] br-lan: port 1(eth0.1) entered disabled state
[ 18.533113] device eth0.1 entered promiscuous mode
[ 18.542775] device eth0 entered promiscuous mode
[ 18.556402] br-lan: port 1(eth0.1) entered blocking state
[ 18.567260] br-lan: port 1(eth0.1) entered forwarding state
[ 18.579193] IPv6: ADDRCONF(NETDEV_UP): br-lan: link is not ready
[ 19.499363] IPv6: ADDRCONF(NETDEV_CHANGE): br-lan: link becomes ready
Zainstalowane pakiety:
base-files - 204.4-r11351-a1ee0ebbd8
blkid - 2.34-1
busybox - 1.30.1-6
dnsmasq - 2.80-16.3
dropbear - 2019.78-2
fdisk - 2.34-1
firewall - 2019-11-22-8174814a-3
fstools - 2020-05-12-84269037-1
fwtool - 2
getrandom - 2019-06-16-4df34a4d-3
hostapd - 2019-08-08-ca8c2bd2-7
hostapd-common - 2019-08-08-ca8c2bd2-7
ip6tables - 1.8.3-1
iptables - 1.8.3-1
iw - 5.0.1-1
jshn - 2020-05-25-66195aee-1
jsonfilter - 2018-02-04-c7e938d6-1
kernel - 4.14.232-1-ec5392878d9894978be40e308cc19639
kmod-cfg80211 - 4.14.232+4.19.189-1-1
kmod-gpio-button-hotplug - 4.14.232-3
kmod-ip6tables - 4.14.232-1
kmod-ipt-conntrack - 4.14.232-1
kmod-ipt-core - 4.14.232-1
kmod-ipt-nat - 4.14.232-1
kmod-ipt-offload - 4.14.232-1
kmod-leds-gpio - 4.14.232-1
kmod-lib-crc-ccitt - 4.14.232-1
kmod-mac80211 - 4.14.232+4.19.189-1-1
kmod-nf-conntrack - 4.14.232-1
kmod-nf-conntrack6 - 4.14.232-1
kmod-nf-flow - 4.14.232-1
kmod-nf-ipt - 4.14.232-1
kmod-nf-ipt6 - 4.14.232-1
kmod-nf-nat - 4.14.232-1
kmod-nf-reject - 4.14.232-1
kmod-nf-reject6 - 4.14.232-1
kmod-nls-base - 4.14.232-1
kmod-ppp - 4.14.232-1
kmod-pppoe - 4.14.232-1
kmod-pppox - 4.14.232-1
kmod-rt2800-lib - 4.14.232+4.19.189-1-1
kmod-rt2800-usb - 4.14.232+4.19.189-1-1
kmod-rt2x00-lib - 4.14.232+4.19.189-1-1
kmod-rt2x00-usb - 4.14.232+4.19.189-1-1
kmod-slhc - 4.14.232-1
kmod-usb-core - 4.14.232-1
libblkid1 - 2.34-1
libblobmsg-json - 2020-05-25-66195aee-1
libc - 1.1.24-2
libfdisk1 - 2.34-1
libgcc1 - 7.5.0-2
libip4tc2 - 1.8.3-1
libip6tc2 - 1.8.3-1
libjson-c2 - 0.12.1-3.1
libjson-script - 2020-05-25-66195aee-1
libmount1 - 2.34-1
libncurses6 - 6.1-5
libnl-tiny - 0.1-5
libpthread - 1.1.24-2
librt - 1.1.24-2
libsmartcols1 - 2.34-1
libubox20191228 - 2020-05-25-66195aee-1
libubus20191227 - 2019-12-27-041c9d1c-1
libuci20130104 - 2019-09-01-415f9e48-4
libuclient20160123 - 2020-06-17-51e16ebf-1
libusb-1.0-0 - 1.0.22-2
libuuid1 - 2.34-1
libxtables12 - 1.8.3-1
logd - 2019-06-16-4df34a4d-3
lsblk - 2.34-1
mtd - 24
netifd - 2021-01-09-753c351b-1
odhcp6c - 2021-01-09-64e1b4e7-16
odhcpd-ipv6only - 2020-05-03-49e4949c-3
openwrt-keyring - 2021-02-20-49283916-2
opkg - 2021-01-31-c5dccea9-1
ppp - 2.4.7.git-2019-05-25-3
ppp-mod-pppoe - 2.4.7.git-2019-05-25-3
procd - 2020-03-07-09b9bd82-1
rt2800-usb-firmware - 20190416-1
swconfig - 12
terminfo - 6.1-5
ubi-utils - 2.1.1-1
ubox - 2019-06-16-4df34a4d-3
ubus - 2019-12-27-041c9d1c-1
ubusd - 2019-12-27-041c9d1c-1
uci - 2019-09-01-415f9e48-4
uclient-fetch - 2020-06-17-51e16ebf-1
urandom-seed - 1.0-1
urngd - 2020-01-21-c7f7b6b6-1
usbutils - 007-10
usign - 2020-05-23-f1f65026-1
wireless-regdb - 2020.11.20-1
wpa-supplicant - 2019-08-08-ca8c2bd2-7
Treść używanego dts jest w poprzednim poście, ale w nim jest #include "mt7621.dtsi" więc wrzucam to dtsi niżej:
#include <dt-bindings/interrupt-controller/mips-gic.h>
#include <dt-bindings/clock/mt7621-clk.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mediatek,mt7621-soc";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "mips,mips1004Kc";
reg = <0>;
};
cpu@1 {
device_type = "cpu";
compatible = "mips,mips1004Kc";
reg = <1>;
};
};
cpuintc: cpuintc {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
aliases {
serial0 = &uartlite;
};
pll: pll {
compatible = "mediatek,mt7621-pll", "syscon";
#clock-cells = <1>;
clock-output-names = "cpu", "bus";
};
sysclock: sysclock {
#clock-cells = <0>;
compatible = "fixed-clock";
/* FIXME: there should be way to detect this */
clock-frequency = <50000000>;
};
palmbus: palmbus@1E000000 {
compatible = "palmbus";
reg = <0x1E000000 0x100000>;
ranges = <0x0 0x1E000000 0x0FFFFF>;
#address-cells = <1>;
#size-cells = <1>;
sysc: sysc@0 {
compatible = "mtk,mt7621-sysc";
reg = <0x0 0x100>;
};
wdt: wdt@100 {
compatible = "mediatek,mt7621-wdt";
reg = <0x100 0x100>;
};
gpio@600 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "mtk,mt7621-gpio";
reg = <0x600 0x100>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 12 IRQ_TYPE_LEVEL_HIGH>;
gpio0: bank@0 {
reg = <0>;
compatible = "mtk,mt7621-gpio-bank";
gpio-controller;
#gpio-cells = <2>;
};
gpio1: bank@1 {
reg = <1>;
compatible = "mtk,mt7621-gpio-bank";
gpio-controller;
#gpio-cells = <2>;
};
gpio2: bank@2 {
reg = <2>;
compatible = "mtk,mt7621-gpio-bank";
gpio-controller;
#gpio-cells = <2>;
};
};
i2c: i2c@900 {
compatible = "mediatek,mt7621-i2c";
reg = <0x900 0x100>;
clocks = <&sysclock>;
resets = <&rstctrl 16>;
reset-names = "i2c";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&i2c_pins>;
};
i2s: i2s@a00 {
compatible = "mediatek,mt7621-i2s";
reg = <0xa00 0x100>;
clocks = <&sysclock>;
resets = <&rstctrl 17>;
reset-names = "i2s";
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 16 IRQ_TYPE_LEVEL_HIGH>;
txdma-req = <2>;
rxdma-req = <3>;
dmas = <&gdma 4>,
<&gdma 6>;
dma-names = "tx", "rx";
status = "disabled";
};
systick: systick@500 {
compatible = "ralink,mt7621-systick", "ralink,cevt-systick";
reg = <0x500 0x10>;
resets = <&rstctrl 28>;
reset-names = "intc";
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 5 IRQ_TYPE_LEVEL_HIGH>;
};
memc: memc@5000 {
compatible = "mtk,mt7621-memc";
reg = <0x5000 0x1000>;
};
cpc: cpc@1fbf0000 {
compatible = "mtk,mt7621-cpc";
reg = <0x1fbf0000 0x8000>;
};
mc: mc@1fbf8000 {
compatible = "mtk,mt7621-mc";
reg = <0x1fbf8000 0x8000>;
};
uartlite: uartlite@c00 {
compatible = "ns16550a";
reg = <0xc00 0x100>;
clock-frequency = <50000000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
no-loopback-test;
};
uartlite2: uartlite2@d00 {
compatible = "ns16550a";
reg = <0xd00 0x100>;
clock-frequency = <50000000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "disabled";
};
uartlite3: uartlite3@e00 {
compatible = "ns16550a";
reg = <0xe00 0x100>;
clock-frequency = <50000000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 28 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "disabled";
};
spi0: spi@b00 {
status = "disabled";
compatible = "ralink,mt7621-spi";
reg = <0xb00 0x100>;
clocks = <&pll MT7621_CLK_BUS>;
resets = <&rstctrl 18>;
reset-names = "spi";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi_pins>;
};
gdma: gdma@2800 {
compatible = "ralink,rt3883-gdma";
reg = <0x2800 0x800>;
resets = <&rstctrl 14>;
reset-names = "dma";
interrupt-parent = <&gic>;
interrupts = <0 13 4>;
#dma-cells = <1>;
#dma-channels = <16>;
#dma-requests = <16>;
status = "disabled";
};
hsdma: hsdma@7000 {
compatible = "mediatek,mt7621-hsdma";
reg = <0x7000 0x1000>;
resets = <&rstctrl 5>;
reset-names = "hsdma";
interrupt-parent = <&gic>;
interrupts = <0 11 4>;
#dma-cells = <1>;
#dma-channels = <1>;
#dma-requests = <1>;
status = "disabled";
};
};
pinctrl: pinctrl {
compatible = "ralink,rt2880-pinmux";
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinctrl0 {
};
i2c_pins: i2c_pins {
i2c_pins {
ralink,group = "i2c";
ralink,function = "i2c";
};
};
spi_pins: spi_pins {
spi_pins {
ralink,group = "spi";
ralink,function = "spi";
};
};
uart1_pins: uart1 {
uart1 {
ralink,group = "uart1";
ralink,function = "uart1";
};
};
uart2_pins: uart2 {
uart2 {
ralink,group = "uart2";
ralink,function = "uart2";
};
};
uart3_pins: uart3 {
uart3 {
ralink,group = "uart3";
ralink,function = "uart3";
};
};
rgmii1_pins: rgmii1 {
rgmii1 {
ralink,group = "rgmii1";
ralink,function = "rgmii1";
};
};
rgmii2_pins: rgmii2 {
rgmii2 {
ralink,group = "rgmii2";
ralink,function = "rgmii2";
};
};
mdio_pins: mdio {
mdio {
ralink,group = "mdio";
ralink,function = "mdio";
};
};
pcie_pins: pcie {
pcie {
ralink,group = "pcie";
ralink,function = "pcie rst";
};
};
nand_pins: nand {
spi-nand {
ralink,group = "spi";
ralink,function = "nand1";
};
sdhci-nand {
ralink,group = "sdhci";
ralink,function = "nand2";
};
};
sdhci_pins: sdhci {
sdhci {
ralink,group = "sdhci";
ralink,function = "sdhci";
};
};
};
rstctrl: rstctrl {
compatible = "ralink,rt2880-reset";
#reset-cells = <1>;
};
clkctrl: clkctrl {
compatible = "ralink,rt2880-clock";
#clock-cells = <1>;
};
sdhci: sdhci@1E130000 {
status = "disabled";
compatible = "ralink,mt7620-sdhci";
reg = <0x1E130000 0x4000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&sdhci_pins>;
};
xhci: xhci@1E1C0000 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
compatible = "mediatek,mt8173-xhci";
reg = <0x1e1c0000 0x1000
0x1e1d0700 0x0100>;
reg-names = "mac", "ippc";
clocks = <&sysclock>;
clock-names = "sys_ck";
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 22 IRQ_TYPE_LEVEL_HIGH>;
/*
* Port 1 of both hubs is one usb slot and referenced here.
* The binding doesn't allow to address individual hubs.
* hub 1 - port 1 is ehci and ohci, hub 2 - port 1 is xhci.
*/
xhci_ehci_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
/*
* Only the second usb hub has a second port. That port serves
* ehci and ohci.
*/
ehci_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
gic: interrupt-controller@1fbc0000 {
compatible = "mti,gic";
reg = <0x1fbc0000 0x2000>;
interrupt-controller;
#interrupt-cells = <3>;
mti,reserved-cpu-vectors = <7>;
timer {
compatible = "mti,gic-timer";
interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
clocks = <&pll MT7621_CLK_CPU>;
};
};
nand: nand@1e003000 {
status = "disabled";
compatible = "mtk,mt7621-nand";
bank-width = <2>;
reg = <0x1e003000 0x800
0x1e003800 0x800>;
};
ethernet: ethernet@1e100000 {
compatible = "mediatek,mt7621-eth";
reg = <0x1e100000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
resets = <&rstctrl 6 &rstctrl 23>;
reset-names = "fe", "eth";
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
mediatek,switch = <&gsw>;
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
phy1f: ethernet-phy@1f {
reg = <0x1f>;
phy-mode = "rgmii";
};
};
hnat: hnat@0 {
compatible = "mediatek,mt7623-hnat";
reg = <0 0x10000>;
mtketh-ppd = "eth0";
mtketh-lan = "eth0";
mtketh-wan = "eth0";
resets = <&rstctrl 0>;
reset-names = "mtketh";
};
};
gsw: gsw@1e110000 {
compatible = "mediatek,mt7621-gsw";
reg = <0x1e110000 0x8000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
};
pcie: pcie@1e140000 {
compatible = "mediatek,mt7621-pci";
reg = <0x1e140000 0x100
0x1e142000 0x100>;
#address-cells = <3>;
#size-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
device_type = "pci";
bus-range = <0 255>;
ranges = <
0x02000000 0 0x00000000 0x60000000 0 0x10000000 /* pci memory */
0x01000000 0 0x00000000 0x1e160000 0 0x00010000 /* io space */
>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH
GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH
GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
resets = <&rstctrl 24 &rstctrl 25 &rstctrl 26>;
reset-names = "pcie0", "pcie1", "pcie2";
clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>;
clock-names = "pcie0", "pcie1", "pcie2";
pcie0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
pcie1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
pcie2: pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
};
więc kluczowe było to dodanie 'compatible="denx,uimage";' do partycji firmware